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The Common Source Amplifier

In the previous post, we discussed how the MOSFET is fundamentally a transconductor: it turns an input voltage (VGSV_{GS}) into an output current (IDI_D). But in most circuits, we want a voltage out, not a current.

To get that, we need the Common Source (CS) Amplifier. Today, we are going to walk through the evolution of this circuit, from the basic resistive load to the high-gain active loads we use in modern ICs.

Basic Common Source Amplifier Circuit

It is the most basic amplifier design. For an amplifier to be a “Common Source,” it needs to follow two conditions:

  1. Input is applied to the Gate of the MOSFET.
  2. Output is taken from the Drain of the MOSFET.

For an amplifier, it is not enough for the device simply to be ON; we specifically need to keep the MOSFET in Saturation.

Why is that?

Ideally, we want the output current (IDI_D) to depend solely on the input voltage (VGSV_{GS}). In Saturation, this is largely true. However, if we don’t keep the device in saturation or if the output voltage swings too low and pushes the device into the Triode (Linear) region, the current becomes strongly dependent on the drain-source voltage (VDSV_{DS}). Since VDSV_{DS} is our output, this dependency introduces severe non-linearity, killing the gain and causing the signal to distort.

That is why you will see a (VbiasV_{bias}) voltage applied in designs. This bias voltage keeps the device in saturation, while VinV_{in} is the signal to be amplified.

Now, let’s analyze the amplifier using the small-signal model.

Small Signal Model of CS Amplifier

For the small-signal model, we short all independent sources. Since (VbiasV_{bias}) and (VddV_{dd}) do not change with time, we consider them AC ground.

  • The voltage across RDR_D is VoutV_{out}.
  • Therefore, the current flowing through RDR_D is Vout/RDV_{out} / R_D.
  • Here, V1=VinV_1 = V_{in}, so gmV1=gmVing_m V_1 = g_m V_{in}.

Applying KCL at the output node: gmVin+VoutRD=0g_m V_{in} + \frac{V_{out}}{R_D} = 0

Gain(Av)=VoutVin=gmRDGain (A_v) = \frac{V_{out}}{V_{in}} = -g_m R_D (Neglecting channel length modulation)

To generalize, we can write the gain equation as:

Gain=gm×(Total resistance between Drain and AC ground)Gain = -g_m \times (\text{Total resistance between Drain and AC ground})

Now, when we connect a load resistor RLR_L, we get the following gain equation:

CS Amplifier with Load Resistor

Gain=gm(RDRL)Gain = -g_m (R_D || R_L)

With channel length modulation (λ0\lambda \neq 0): Gain=gm(RDRLro)Gain = -g_m (R_D || R_L || r_o)

Biasing with a Resistor Divider

Instead of explicitly adding a separate VbiasV_{bias} source, we can bias the MOSFET using a resistor divider.

CS Amplifier with 2-Resistor Bias Network

In this design, R1R_1 and R2R_2 generate a VGSV_{GS} which biases the device in saturation. Capacitors C1C_1 and C2C_2 are added to block DC voltage.

  • C1C_1 prevents the DC bias voltage at the Gate (created by the voltage divider R1R_1 and R2R_2) from flowing back into the input signal source.
  • C2C_2 prevents the DC voltage present at the Drain from appearing at the output (VoutV_{out}) or flowing through the load resistor (RLR_L).

Both capacitors allow the AC signal to pass through.

Design Steps for a CS Amplifier

Here is a typical workflow for designing the amplifier above:

  1. Find Max IDI_D: From your power constraint (P=VDD×ImaxP = V_{DD} \times I_{max}).
  2. Find Min IDI_D: From your Slew Rate requirement (SR=ID/CLoadSR = I_D / C_{Load}). We usually select a current closer to the maximum allowable value to get maximum gain.
  3. Fix RDR_D for Maximum Symmetrical Swing: RD=VDD2IDR_D = \frac{V_{DD}}{2 I_D} (More accurately: RD=(VDDVov)/(2IDQ)R_D = (V_{DD} - V_{ov}) / (2 I_{DQ})) Since VovV_{ov} is initially unknown, we can start with the first equation and revisit this step later.
  4. Fix W/LW/L for Required Gain: Gain=gmRDGain = -g_m R_D, gm=2μnCox(W/L)IDg_m = \sqrt{2 \mu_n C_{ox} (W/L) I_D} From this, calculate the required W/LW/L.
  5. Calculate R1R_1 & R2R_2: From gmg_m, we find the required overdrive voltage VovV_{ov}. Vov=VGSVthwhereVGS=(R2R1+R2)VDDV_{ov} = V_{GS} - V_{th} \quad \text{where} \quad V_{GS} = \left(\frac{R_2}{R_1+R_2}\right) V_{DD} Fix one value (R1R_1 or R2R_2) and calculate the other.
  6. Calculate C1C_1 & C2C_2: A capacitor in series acts as a high-pass filter (f=1/2πRCf = 1 / 2\pi RC). Calculate CC such that the cutoff frequency is much lower than the desired operating frequency (e.g., calculate for f/10f/10) to ensure the capacitor value is large enough.

Maximum Input Calculation

How do we know the maximum input voltage we can apply while maintaining a symmetrical output swing?

  1. Calculate IDI_D based on the input bias voltage.
  2. Calculate the DC operating point at the Drain: VD=VDDIDRDV_D = V_{DD} - I_D R_D.
  3. Calculate gmg_m and the Gain.
  4. The lowest the output can go is VovV_{ov} (below that, the device enters the linear region).
  5. Example: If Vov=0.2VV_{ov} = 0.2V and the DC operating point is 0.4V0.4V, the output can swing down by 0.2V0.2V. For a symmetrical swing, it can also go 0.2V0.2V up.
  6. To find the max input, divide this max output swing by the gain.
    • If Gain = 14 V/V, Max Input = 0.2/1414.2mV0.2 / 14 \approx 14.2mV.

Source Degeneration

So far, we have seen the basic Common Source amplifier, but it is very sensitive to any changes in the DC operating point. If the temperature shifts or the manufacturing isn’t perfect, the performance can swing unpredictably. Plus, large input signals tend to distort the output.

This is where Source Degeneration comes in. By simply adding a resistor to the source, we introduce a local negative feedback. We trade away some gain, but in exchange, we get an amplifier that is much more stable, linear, and reliable.

CS Amplifier with Source Degeneration

If the input voltage rises (due to noise or variation), the current increases, raising the voltage at the Source (VS=IDRSV_S = I_D R_S). This reduces the effective gate-to-source voltage (VGSV_{GS}), counteracting the input change.

Deriving the Gain:

Vin=Vgs+IDRSV_{in} = V_{gs} + I_D R_S

Vin=Vgs+gmVgsRS=Vgs(1+gmRS)V_{in} = V_{gs} + g_m V_{gs} R_S = V_{gs} (1 + g_m R_S)

Vout=IDRD=gmVgsRDV_{out} = -I_D R_D = -g_m V_{gs} R_D

So, VoutVin=gmRD1+gmRS=RD1/gm+RS\frac{V_{out}}{V_{in}} = \frac{-g_m R_D}{1 + g_m R_S} = \frac{-R_D}{1/g_m + R_S}

We can generalize the gain expression for a CS amplifier with source degeneration as:

Av=Resistance between Drain & AC Ground1gm+Resistance between Source & AC GroundA_v = - \frac{\text{Resistance between Drain \& AC Ground}}{\frac{1}{g_m} + \text{Resistance between Source \& AC Ground}}

(assuming λ=0\lambda = 0)

This generalized expression is extremely handy when analyzing complicated degeneration circuits!

Restoring the Gain: One of the easiest ways to get the gain back is by adding a capacitor in parallel with the degeneration resistor.

  • The capacitor has very high impedance at low frequencies (DC), so RSR_S does its job for stability.
  • At high frequencies (AC), RSR_S is shorted by the capacitor, and we regain our high gain.

The Quest for Higher Gain

If we stick to using a resistor for the load, we only have two options to increase gain:

  1. Increase RDR_D: Since VDS=VDDIDRDV_{DS} = V_{DD} - I_D R_D, increasing RDR_D too much reduces VDSV_{DS}, pushing the device into the Triode region. Also, large resistors contribute significant thermal noise.
  2. Increase gmg_m: For that we can either increase current or W/LW/L. Increasing W/LW/L requires reducing VovV_{ov} to keep current constant. However, for large W/LW/L and very low VGSV_{GS}, we enter subthreshold conduction where gm2ID/(1.5VT)g_m \approx 2I_D / (1.5 V_T). There is an upper limit.

Another option is to make RD=R_D = \infty (an open circuit). But then no bias current would flow!

We need a device that allows bias current to pass but acts as an open circuit (High R) in small-signal analysis. You guessed it: A Current Source.

In that case, RDroR_D || r_o becomes just ror_o. Av=gmroA_v = -g_m r_o

This is called the Intrinsic Gain which is the maximum gain we can get from a single device.

Side Note: Calculating Impedance

Input and Output Impedance Calculation Setup

  • Input Impedance: Set independent sources to zero (Voltage=Short, Current=Open). Apply a small voltage VxV_x at the input and measure the current ixi_x. Impedance = Vx/ixV_x / i_x.
  • Output Impedance: Follow the same process at the output node and also set the input voltage to zero.

CS Amplifier with Active Loads

A current source is a circuit element that delivers a constant current regardless of the voltage across it. It acts like a low-resistance valve for bias current but looks like an infinite resistor (Open Circuit) to the small signal.

Now, we cannot simply walk into a store and ask for a current source. We use a MOSFET in saturation as a current source. Ideally, for a MOSFET in saturation the drain current (IDI_D) is independant of the (VDSV_{DS}). But due to channel length modulation, (IDI_D) does change with (VDSV_{DS}). This internal resistance is modelled by r0.

So practically, a MOSFET as a current source has some limitations. The current changes slightly if the voltage across it changes and we need a minimum voltage across it and a bias voltage at it’s input so that the device stays in saturation.

Ideally Current Source Concept

In a Common Source amplifier, we typically use a PMOS transistor at the top to act as this current source.

CS Amplifier with Current Source Load

To simplify, think of the PMOS as a resistor with value ro2r_{o2}. The gain becomes:

Gain=gm1(ro1ro2)Gain = -g_{m1} (r_{o1} || r_{o2})

(Note: We use gm1g_{m1} because the input is applied to M1).

The Diode-Connected Load

There is another common configuration: the Diode-Connected Device. This is where the Gate and Drain of the MOSFET is shorted. This connection ensures the device always stays in saturation because VDSV_{DS} will always equal VGSV_{GS}, which is greater than VGSVTHV_{GS} - V_{TH}.

Diode Connected MOSFET

Impedance: Looking into the source of a diode-connected device: Rout=ro1gm1gmR_{out} = r_o || \frac{1}{g_m} \approx \frac{1}{g_m} (Since 1/gm1/g_m is much smaller, it dominates).

Consider a CS amplifier with diode connected load

CS Amplifier with Diode Connected Load

Av=gm1×1gm2=gm1gm2A_v = -g_{m1} \times \frac{1}{g_{m2}} = -\frac{g_{m1}}{g_{m2}} (Assuming λ=0\lambda = 0)

The gain is simply the ratio of the transconductance of M1 and M2. While this gain is low, it is determined by geometric ratios, making it very precise and useful in many applications.

Boosting the Current Source

If we use a single device as a current source, the impedance is ror_o. We can improve this using Degeneration.

Current Source with Degeneration

Deriving the impedance looking into the drain:

V1=ixRsV_1 = -i_x R_s

Vx=ro(ix+gmixRs)+ixRsV_x = r_o(i_x + g_m i_x R_s) + i_x R_s

Vxix=(1+gmro)Rs+ro\frac{V_x}{i_x} = (1 + g_m r_o)R_s + r_o

The impedance ror_o is boosted by roughly (1+gmro)Rs(1 + g_m r_o)R_s. This is an important result to remember!

Summary of Impedances

Let’s revisit the CS amplifier with source degeneration to calculate its final impedances:

CS Amplifier with Degeneration - Small Signal

  • Input Impedance: Rin=R_{in} = \infty
  • Output Impedance: Rout=[(1+gmr0)RS+r0]RDR_{out} = \left[ (1 + g_m r_0)R_S + r_0 \right] || R_D

The Self-Biased Amplifier

Finally, let’s look at an interesting variant: The Self-Biased Amplifier.

Self Biased CS Amplifier

Consider if the threshold voltage (VthV_{th}) drops (due to process variation). IDI_D would normally increase.

  • If IDI_D increases, the voltage drop across the load increases, so VDSV_{DS} (node VxV_x) goes down.
  • Since no current flows through the feedback resistor RFR_F, point XX and Gate (GG) are at the same potential.
  • Therefore, if VxV_x goes down, VGV_G goes down.
  • This reduces VGSV_{GS}, which pulls IDI_D back down.

It acts as a self-correcting system!

Conclusion

We have evolved the humble Common Source amplifier from a theoretical textbook circuit (with a resistor load) to a robust, self-biased building block ready for real-world integration.

The takeaway here is that Analog Design is rarely about finding the “perfect” circuit; it is about choosing the right trade-off. We used degeneration to trade gain for linearity, and active loads to trade voltage headroom for massive output impedance.

Mastering these DC operating points is crucial because, in the next post, things are going to get messy. We will introduce parasitic capacitances into the mix and tackle Frequency Response and the infamous Miller Effect that limits how fast this amplifier can actually run.

But for now, fire up the simulator and make sure your MOSFETs are staying deep in saturation.